Synchrotron radiation light source is an advanced photon source with a wide spectrum, high brightness and high collimation generated when relativistic electrons move along a curved path in a storage ring. Featuring core advantages of ultra-high brightness, high collimation, broad spectral range, high polarization and pulsed temporal structure, it is widely applied in cutting-edge research fields including materials science, life science, environmental science, condensed matter physics, chemistry and medicine, serving as a major national scientific and technological infrastructure and a core platform for interdisciplinary research. The high-voltage power supply is an essential supporting component of synchrotron radiation beamline stations, delivering high-precision and ultra-high-stability high-voltage power to key equipment such as insertion devices, monochromators, beam deflectors, focusing mirrors, photodetectors and ionization chambers. Its long-term output voltage stability, low-noise performance, synchronous control accuracy and anti-interference capability directly determine the energy accuracy, focusing precision, spot stability and detection sensitivity of synchrotron radiation beams. Synchrotron radiation beamline stations impose extremely stringent ultra-high stability requirements on high-voltage power supplies. Depending on application scenarios, the output voltage ranges from 0 to 10 kV, while some insertion device drive power supplies require 0 to 100 kV high-voltage output. The specifications demand long-term output voltage stability ≤ ±1 ppm/8 h, short-term stability ≤ ±0.1 ppm/10 s, and peak-to-peak output voltage ripple ≤ 0.001 %. Meanwhile, the remote synchronous control accuracy among multiple power supplies shall be ≤ 1 μs to realize coordinated operation and joint experiments across multiple beamline stations. Traditional high-voltage power supplies suffer from inherent drawbacks such as insufficient long-term stability, large temperature drift, low synchronous control accuracy and poor anti-interference performance, failing to meet the ultra-high-precision demands of synchrotron radiation beamline stations. Relevant designs must strictly comply with standards including GB/T 20127-2006 *Terminology for Synchrotron Radiation Light Sources*, JJF 1734-2019 *Calibration Specification for DC High-Voltage Sources*, and the GB/T 17626 series of EMC standards, while satisfying the core requirements of synchrotron radiation facilities for long-term continuous operation, high reliability and remote synchronous control. Targeting the key application demands and technical challenges of high-voltage power supplies for synchrotron radiation beamlines, this methodology establishes a full-process general technical framework covering ultra-high-stability topology design, full-link long-term stability optimization, ppm-level precision control, remote synchronous control and radiation environment adaptability design. It accommodates the high-voltage power demands of various synchrotron radiation beamline stations and provides standardized design criteria for the performance improvement and domestic construction of Chinese synchrotron radiation facilities. Addressing the core design challenges of ultra-high stability, ppm-level control precision and remote multi-device synchronization in synchrotron radiation beamline scenarios, this methodology adopts the main architecture of **front-stage isolated LLC resonant inversion + rear-stage high-voltage linear regulation + full-digital constant temperature control + optical fiber synchronous transmission**, combined with full-temperature-range adaptive compensation and full-link low-noise optimization. It fundamentally overcomes the technical bottlenecks of traditional power supplies regarding insufficient long-term stability and low synchronous control accuracy, achieving long-term voltage stability of ±1 ppm/8 h and remote multi-device synchronous control accuracy within 1 μs, which fully meets the full-operation requirements of synchrotron radiation beamline stations. The design follows five core criteria: First, a two-stage topology of **front-stage isolated LLC resonant inversion + rear-stage high-voltage linear regulation** is adopted to realize ultra-high-stability, low-ripple and low-noise high-voltage output from the architectural root. The front-stage isolated LLC resonant inversion unit achieves electrical isolation between input and output and pre-boosts the voltage, converting low-voltage AC from the grid into high-voltage DC close to the target value to provide a stable input for the rear-stage linear regulator. Optimized via fundamental wave analysis, the resonant cavity parameters ensure zero-voltage switching (ZVS) for primary power switches and zero-current switching (ZCS) for secondary rectifiers across the full input voltage and load ranges, delivering ultra-low switching loss, minor output ripple and reduced electromagnetic interference. A fixed-frequency operating mode eliminates ripple variation and EMI caused by frequency modulation; the switching frequency is set above 100 kHz and outside the signal bandwidth of beamline detectors to avoid harmonic interference with weak signal detection. The output of the front inverter passes through two-stage LC low-pass filters to suppress ripple below 10 mV, offering low-noise and highly stable input for the rear linear regulator. The rear high-voltage linear regulator is the core for ultra-stable output, adopting a deep closed-loop regulation circuit composed of high-voltage series pass transistors and high-gain, wide-bandwidth, low-drift error amplifiers. It features exceptional power supply ripple rejection ratio and ultra-low output noise, enabling precision regulation across the full voltage range with PSRR ≥ 140 dB @100 Hz and ≥ 100 dB @100 kHz, thoroughly suppressing residual ripple and noise from the front stage to achieve ppm-level stability. Meanwhile, an adaptive floating rail power supply scheme dynamically adjusts the supply voltage of the series pass transistor, maintaining an optimal voltage drop of 30–50 V. This guarantees deep closed-loop regulation while significantly reducing power consumption and heat generation of the pass transistor, eliminating temperature drift and stability degradation caused by excessive heat in conventional fixed-rail linear topologies, and improving overall efficiency and long-term reliability. The high-precision feedback sampling unit adopts a differential voltage divider network with ultra-low-temperature-drift resistors to scale down high-voltage output for closed-loop negative feedback. High-precision metal foil resistors with temperature coefficient ≤ 0.5 ppm/°C and precision ±0.001 % are selected, strictly matched and aged to ensure long-term stability and temperature consistency of the division ratio. The divider network is enclosed in a constant-temperature shielding chamber to eliminate ambient temperature fluctuation and airflow disturbance, securing long-term closed-loop control precision at the hardware level. Second, ppm-level ultra-high stability optimization adopts a four-tier guarantee scheme: **ultra-low-drift component selection + constant-temperature control for core devices + full-temperature-range adaptive compensation + full-range multi-point calibration**, ensuring long-term stability ≤ ±1 ppm/8 h and short-term stability ≤ ±0.1 ppm/10 s. For component selection, all critical devices adopt ultra-low-temperature-coefficient and high-longevity models: laboratory-grade low-drift Zener voltage references with temperature coefficient ≤ 0.2 ppm/°C, long-term stability ≤ 0.5 ppm/1000 h and annual stability ≤ 1 ppm; chopper-stabilized operational amplifiers with input offset voltage ≤ 1 μV, offset drift ≤ 0.01 μV/°C and input noise density ≤ 10 nV/√Hz @1 kHz; metal foil divider resistors with TC ≤ 0.5 ppm/°C; and NP0 ceramic & polystyrene film capacitors with TC ≤ ±10 ppm/°C, minimizing drift at the component source. Core temperature-sensitive components (voltage references, error amplifiers, divider networks) are placed in a dual-layer constant-temperature shielding chamber with high-vacuum thermal insulation and high-precision PID temperature control, stabilizing the internal temperature at 25 °C ± 0.005 °C with fluctuation ≤ 5 mK to eliminate thermal drift fundamentally. Multiple high-precision platinum resistance temperature sensors monitor ambient temperature, power stage temperature, input voltage and load current. During factory calibration, multi-point testing across −10 °C to +40 °C, full voltage and full load ranges establishes a high-order polynomial drift model stored in FPGA. During operation, the model dynamically corrects the reference voltage and closed-loop parameters in real time to compensate for temperature, input and load variations, maintaining ppm-level stability under all working conditions. Full-range calibration with no fewer than 100 evenly spaced points, verified via an 8.5-digit high-precision multimeter, establishes a linearity correction model to restrict full-scale linearity error ≤ ±0.5 ppm. Third, full-link ultra-low noise and ripple suppression implements a three-tier noise reduction strategy: **source noise suppression + full-link multi-stage filtering + fully sealed electromagnetic shielding**, achieving peak-to-peak ripple ≤ 0.001 % and noise density ≤ 5 nV/√Hz @1 kHz. At the noise source, the front LLC inverter operates in full soft-switch mode to eliminate voltage spikes and high-frequency noise from hard switching; SiC MOSFETs and SiC Schottky diodes reduce device-level noise. The final output adopts pure linear regulation with no switching action, eliminating additional switching noise; multi-stage low-noise linear regulators purify the auxiliary power supply to isolate grid ripple. An eight-stage full-band filtering architecture covers the entire signal path: three-stage EMI filtering at the grid input for common-mode, differential-mode and surge suppression; combined low-ESR film & high-frequency ceramic capacitors on the DC bus; three-stage LC low-pass filtering at the LLC output; π-type RC filtering before the linear regulator; four cascaded π-type RC filters at the final output for low/mid/high/ultra-high frequency noise suppression; low-noise triaxial high-voltage output cables with dual shielding; and on-chip decoupling near load terminals to eliminate long-cable high-frequency coupling. The whole machine features a three-layer sealed shielding enclosure: inner permalloy for ultra-low-frequency magnetic shielding, middle pure copper for high-frequency electric shielding, and outer aluminum alloy for mechanical protection, delivering shielding effectiveness ≥ 140 dB. Power, linear regulation, precision control and reference units are isolated in independent metal cavities; sensitive analog circuits are enclosed in dual constant-temperature shielding chambers; all interfaces adopt shielded connectors with 360° shielding bonding to prevent electromagnetic leakage. Fourth, the remote multi-device synchronous control architecture realizes synchronous accuracy ≤ 1 μs and timing jitter ≤ 100 ns via **high-precision constant-temperature crystal oscillator + FPGA hardware timing + all-fiber synchronous transmission**. A 10 MHz double-oven OCXO with daily stability ≤ ±1 ppb and phase noise ≤ −170 dBc/Hz @1 kHz provides an ultra-low-jitter clock reference. All timing, triggering and parameter configuration are implemented in pure FPGA hardware logic with 10 ns resolution, eliminating software delay and jitter while allowing flexible remote configuration of output voltage, trigger delay and slew rate to adapt to diverse experimental requirements. Optical fiber transmission ensures delay-free, lossless and EMI-immune synchronous signal delivery over hundreds to thousands of meters between the central control room and beamline stations, with transmission jitter ≤ 100 ps and complete isolation of ground potential interference. An Ethernet-based remote control platform supports TCP/IP, Modbus-TCP and EPICS protocols for remote configuration, monitoring, data acquisition, alarm and programming, seamlessly integrating with the central facility control system; local/remote switching supports both on-site debugging and automatic long-term operation. Fifth, radiation environment adaptability and high-reliability design ensure long-term uninterrupted operation under strong radiation via radiation hardening, redundancy, full-protection and optimized thermal management. All semiconductors adopt radiation-hardened industrial-grade components with total ionizing dose tolerance ≥ 30 krad (Si); triple modular redundancy and EDAC error correction prevent single-event effects; local lead shielding protects sensitive circuits against ionization radiation. Dual redundant AC input and redundant control power supplies enable seamless switchover without shutdown; key control circuits adopt hot backup. Comprehensive hardware & software protection includes input over/under voltage, output overvoltage, overcurrent/short circuit, over-temperature, high-voltage arcing and open-circuit protection with hardware response ≤ 1 μs to instantly cut high voltage during faults and protect expensive beamline equipment. Soft start, slew control and emergency stop functions, together with vacuum and interlock safety interfaces, ensure equipment and personnel safety. A hybrid full-conduction & forced-air cooling scheme keeps component operating temperatures below 70 % of rated values to slow aging; redundant temperature-controlled fans prevent overheating shutdown for year-round continuous operation. Lifecycle stability guarantee, system integration and optimized operation & maintenance serve as core supports for long-term facility operation. Built-in periodic self-calibration corrects long-term component aging drift to maintain ppm-level stability throughout the lifecycle; health monitoring and remaining useful life prediction enable predictive maintenance to avoid unplanned downtime. Standard hardware interfaces support ±10 V analog control, isolated trigger I/O and safety interlocks for seamless integration with motion control, data acquisition and vacuum systems; software compatibility with EPICS, TANGO, Modbus-TCP and OPC UA enables plug-and-play connection with central control platforms, shortening beamline commissioning cycles. Comprehensive fault diagnosis, log recording (≥1 year storage), remote maintenance and three-level user permission management enhance operational efficiency and safety. All equipment undergoes strict environmental, EMC and long-term aging tests; over 1,000 hours of full-load burn-in verifies MTBF ≥ 100,000 hours to meet long-term continuous operation demands of large scientific facilities. In summary, this methodology forms a complete technical framework covering ultra-high-stability topology, ppm-level precision control, remote multi-device synchronization and high-reliability design, resolving the traditional pain points of insufficient long-term stability, low synchronization accuracy and poor noise immunity. It achieves ±1 ppm/8 h long-term stability via two-stage topology and four-tier stability guarantee, 1 μs multi-device synchronization via all-fiber transmission and FPGA hardware control, and ultra-low ripple below 0.001 % via three-stage noise suppression. Fully compliant with the ultra-high-precision demands of synchrotron radiation beamlines, it can be widely applied in synchrotron radiation light sources and free-electron laser facilities, providing core technical support for the domestic construction and performance upgrading of major national scientific and technological infrastructures.